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TileCal Phase-2 Upgrade


The TileCal upgrade program for Phase-2 is focused on a complete replacement of the read-out electronics. This development is driven by the requirements of increased radiation tolerance, and the need to provide the level‑1 trigger with improved precision and granularity. It is expected that the detector itself (steel, scintillators, fibers, and photomultipliers) requires only minor adjustments. However, the present electronics will have to be replaced with a new architecture to meet the new requirements imposed by the luminosity upgrade. The replacement of the complete read-out electronics of TileCal is planned for the second long shutdown of LHC (Phase-2).

The sROD AMC demonstrator

The sROD demonstrator is the core element of the TileCal back-end electronics system and provides benchmarks for investigating the four different parts of the upgrade sROD system.  State-of-the-art optical connections are evaluated in order to implement the reception of digitized samples at 40MHz for each photomultiplier. The received data are stored in programmable pipeline memories and transferred to a derandomizer buffer on the reception of the level-1 acceptance signal. The L1Calo preprocessor module implements the algorithms to provide digital information to the first level of trigger of ATLAS. The new architecture of the read-out improves the precision and the granularity or the trigger information for the cluster and jet energy L1Calo processors. The increased granularity can be achieved in the radial direction, which would eventually allow the implementation of shower profile algorithms at level-1. The use of digital signals at the sRODs for the level-1 trigger replaces the present analog level-1 trigger preprocessors. The sROD demonstrator board transfers the data accepted by the first level of trigger to the Read-Out System (ROS). In addition, the sROD is the back-end interface with the Detector Control System (DCS) and for the Trigger, Timing and Control (TTC) of the front-end electronics.


Sketch of the TileCal Upgrade Phase-2 off-detector system

The sROD demonstrator consists of a double mid-size Advance Mezzanine Card (AMC) that is operated in an ATCA carrier. The data is received through four SNAP12 optical connectors and the internal hardware transceivers located in the main FPGA. This FPGA also contains the pipeline and derandomizer memories, the synchronization of data with TTC and the reconstruction of the events passing the first level of trigger. This FPGA is the interface to the ATCA carrier for configuration, operation and monitoring. The L1Calo trigger algorithms are implemented in a dedicated FPGA that additionally provides communication with the L1Calo system through optical link connectors. The link with the L1Calo and with the ROS has been implemented in a standard Field Programmable Mezzanine Card (FMC), which provides the opportunity to evaluate different connector technologies. Additional FMC connectors are used to include enhanced clock recovery functions as well as the Module Management Controller (MMC).


Block diagram of the sROD AMC

The sROD ATCA test-bench

The ATCA framework has been selected to implement the sROD demonstrator system. An ATCA test-bench has been setup in the IFIC TileCal laboratory in Valencia. It is composed by a Radisys ATCA 6-slot chassis that includes Shelf Management and Switch Controller. In addition it contains an Intel Xeon Computer and Processor Module (ATCA-4500) and an ATCA carrier (ATCA-1200). The carrier is used to provide to the AMC sROD board power supply and communication with Base and Fabric interfaces in the backplane.


The 6-slot ATCA chassis (left) and the ATCA carrier (right)


  • ATLAS Upgrade Week - Tile session(10th November 2009): Slides
  • TileWeek? - Upgrade session (Feb 2010): Slides
  • TileWeek? - Upgrade session (June 2010): Slides
  • TileWeek? - Upgrade session (Oct 2010): Slides
  • ATLAS Upgrade Weel - Tile session ( Nov 2010): Slides
  • TileWeek? - Upgrade session (March 2011): Slides
  • TileWeek? - Upgrade session (June 2011): Slides
  • TileWeek? - Upgrade session (Oct 2011): Slides
  • TIleWeek? - Upgrade session (Feb 2012): Slides
  • ATLAS Upgrade Week - L1Calo/LAr/Tile Joint session (March 2012): Slides
  • ATLAS Upgrade Week - Parallel session (March 2012): Slides

-- Main.avalero - 29 Dec 2009

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pngtiff backend.tiff manage 149.1 K 15 May 2012 - 11:33 Main.avalero Sketch of the back-end system
pngpng backend.png manage 76.4 K 15 May 2012 - 11:35 Main.avalero Sketch of the back-end system
pngpng AMCsROD.png manage 145.7 K 18 May 2012 - 07:25 Main.avalero Block diagram of the sROD AMC
pngpng ATCAcarrier.png manage 617.2 K 18 May 2012 - 11:31 Main.avalero ATCA carrier board
pngpng ATCAchassis.png manage 509.4 K 18 May 2012 - 11:32 Main.avalero ATCA chassis
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